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authorGilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>2014-07-05 11:08:47 +0200
committerGilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>2014-08-16 18:32:23 +0200
commit6bddad26771a3e7ff655f41e97586d220613d46f (patch)
tree330cdd9255114f091adbbde010eed6496702afe9
parent4c85188d7303ce4685cb96c026c25c355b12da54 (diff)
downloadipipe-gch-6bddad26771a3e7ff655f41e97586d220613d46f.tar.bz2
at91/ipipe: adapt to AIC5
Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/mach-at91/gpio.c19
-rw-r--r--arch/arm/mach-at91/irq.c51
2 files changed, 58 insertions, 12 deletions
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index 8ef9c3eb..ec539bc 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -994,6 +994,10 @@ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks)
994} 994}
995 995
996#if defined(CONFIG_IPIPE) 996#if defined(CONFIG_IPIPE)
997extern unsigned long at91_aic_caps;
998#define AT91_AIC_CAP_AIC5 (1 << 0)
999#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5)
1000
997static void at91_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq) 1001static void at91_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
998{ 1002{
999 struct irq_desc *desc = irq_to_desc(irq); 1003 struct irq_desc *desc = irq_to_desc(irq);
@@ -1006,19 +1010,19 @@ static void at91_enable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
1006 if (chip == &gpio_irqchip) { 1010 if (chip == &gpio_irqchip) {
1007 struct at91_gpio_chip *chip = irq_data_get_irq_chip_data(idata); 1011 struct at91_gpio_chip *chip = irq_data_get_irq_chip_data(idata);
1008 1012
1009 if (ipd == &ipipe_root) 1013 if (ipd == &ipipe_root)
1010 chip->root |= (1 << idata->hwirq); 1014 chip->root |= (1 << idata->hwirq);
1011 else 1015 else
1012 chip->root &= ~(1 << idata->hwirq); 1016 chip->root &= ~(1 << idata->hwirq);
1013 1017
1014 if (ipd != &ipipe_root && ++(*chip->nr_nonroot) == 1) 1018 if (ipd != &ipipe_root && ++(*chip->nr_nonroot) == 1)
1015 aic_root &= ~(1 << chip->pioc_hwirq); 1019 aic_root &= ~(1 << chip->pioc_hwirq);
1016 } else { 1020 } else {
1017 if (ipd == &ipipe_root) 1021 if (ipd == &ipipe_root)
1018 aic_root |= (1 << idata->hwirq); 1022 aic_root |= (1 << idata->hwirq);
1019 else 1023 else
1020 aic_root &= ~(1 << idata->hwirq); 1024 aic_root &= ~(1 << idata->hwirq);
1021 } 1025 }
1022} 1026}
1023 1027
1024static void at91_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq) 1028static void at91_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
@@ -1030,12 +1034,12 @@ static void at91_disable_irqdesc(struct ipipe_domain *ipd, unsigned irq)
1030 if (chip == &gpio_irqchip) { 1034 if (chip == &gpio_irqchip) {
1031 struct at91_gpio_chip *chip = irq_data_get_irq_chip_data(idata); 1035 struct at91_gpio_chip *chip = irq_data_get_irq_chip_data(idata);
1032 1036
1033 if (ipd != &ipipe_root) 1037 if (ipd != &ipipe_root)
1034 chip->root |= (1 << idata->hwirq); 1038 chip->root |= (1 << idata->hwirq);
1035 1039
1036 if (ipd != &ipipe_root && --(*chip->nr_nonroot) == 0) 1040 if (ipd != &ipipe_root && --(*chip->nr_nonroot) == 0)
1037 aic_root |= (1 << chip->pioc_hwirq); 1041 aic_root |= (1 << chip->pioc_hwirq);
1038 } else 1042 } else
1039 if (ipd != &ipipe_root) 1043 if (ipd != &ipipe_root)
1040 aic_root |= (1 << idata->hwirq); 1044 aic_root |= (1 << idata->hwirq);
1041} 1045}
@@ -1089,6 +1093,9 @@ void at91_pic_muter_register(void)
1089 .unmute = at91_unmute_pic, 1093 .unmute = at91_unmute_pic,
1090 }; 1094 };
1091 1095
1096 if (has_aic5())
1097 return;
1098
1092 ipipe_pic_muter_register(&at91_pic_muter); 1099 ipipe_pic_muter_register(&at91_pic_muter);
1093} 1100}
1094#endif /* CONFIG_IPIPE */ 1101#endif /* CONFIG_IPIPE */
diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c
index a18f229..be13b65 100644
--- a/arch/arm/mach-at91/irq.c
+++ b/arch/arm/mach-at91/irq.c
@@ -48,7 +48,7 @@ void __iomem *at91_aic_base;
48static struct irq_domain *at91_aic_domain; 48static struct irq_domain *at91_aic_domain;
49static struct device_node *at91_aic_np; 49static struct device_node *at91_aic_np;
50static unsigned int n_irqs = NR_AIC_IRQS; 50static unsigned int n_irqs = NR_AIC_IRQS;
51static unsigned long at91_aic_caps = 0; 51unsigned long at91_aic_caps = 0;
52 52
53/* AIC5 introduces a Source Select Register */ 53/* AIC5 introduces a Source Select Register */
54#define AT91_AIC_CAP_AIC5 (1 << 0) 54#define AT91_AIC_CAP_AIC5 (1 << 0)
@@ -202,7 +202,7 @@ static void at91_aic_mask_irq(struct irq_data *d)
202 hard_cond_local_irq_restore(flags); 202 hard_cond_local_irq_restore(flags);
203} 203}
204 204
205static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d) 205static inline void at91_aic5_hard_mask_irq(struct irq_data *d)
206{ 206{
207 /* Disable interrupt on AIC5 */ 207 /* Disable interrupt on AIC5 */
208 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); 208 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
@@ -211,6 +211,16 @@ static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d)
211 clear_backup(d->hwirq); 211 clear_backup(d->hwirq);
212} 212}
213 213
214static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d)
215{
216 unsigned long flags;
217
218 flags = hard_cond_local_irq_save();
219 at91_aic5_hard_mask_irq(d);
220 ipipe_lock_irq(d->irq);
221 hard_cond_local_irq_restore(flags);
222}
223
214static inline void at91_aic_hard_unmask_irq(struct irq_data *d) 224static inline void at91_aic_hard_unmask_irq(struct irq_data *d)
215{ 225{
216 /* Enable interrupt on AIC */ 226 /* Enable interrupt on AIC */
@@ -229,7 +239,7 @@ static void at91_aic_unmask_irq(struct irq_data *d)
229 hard_cond_local_irq_restore(flags); 239 hard_cond_local_irq_restore(flags);
230} 240}
231 241
232static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d) 242static inline void at91_aic5_hard_unmask_irq(struct irq_data *d)
233{ 243{
234 /* Enable interrupt on AIC5 */ 244 /* Enable interrupt on AIC5 */
235 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); 245 at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK);
@@ -238,6 +248,16 @@ static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d)
238 set_backup(d->hwirq); 248 set_backup(d->hwirq);
239} 249}
240 250
251static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d)
252{
253 unsigned long flags;
254
255 flags = hard_cond_local_irq_save();
256 at91_aic5_hard_unmask_irq(d);
257 ipipe_unlock_irq(d->irq);
258 hard_cond_local_irq_restore(flags);
259}
260
241static void at91_aic_eoi(struct irq_data *d) 261static void at91_aic_eoi(struct irq_data *d)
242{ 262{
243 /* 263 /*
@@ -247,6 +267,11 @@ static void at91_aic_eoi(struct irq_data *d)
247 at91_aic_write(AT91_AIC_EOICR, 0); 267 at91_aic_write(AT91_AIC_EOICR, 0);
248} 268}
249 269
270static void __maybe_unused at91_aic5_eoi(struct irq_data *d)
271{
272 at91_aic_write(AT91_AIC5_EOICR, 0);
273}
274
250#ifdef CONFIG_IPIPE 275#ifdef CONFIG_IPIPE
251static void at91_aic_hold_irq(struct irq_data *d) 276static void at91_aic_hold_irq(struct irq_data *d)
252{ 277{
@@ -256,14 +281,24 @@ static void at91_aic_hold_irq(struct irq_data *d)
256 281
257static void at91_aic_release_irq(struct irq_data *d) 282static void at91_aic_release_irq(struct irq_data *d)
258{ 283{
284 unsigned long flags = hard_local_irq_save();
259 at91_aic_hard_unmask_irq(d); 285 at91_aic_hard_unmask_irq(d);
286 hard_local_irq_restore(flags);
260} 287}
261#endif /* CONFIG_IPIPE */
262 288
263static void __maybe_unused at91_aic5_eoi(struct irq_data *d) 289static void __maybe_unused at91_aic5_hold_irq(struct irq_data *d)
264{ 290{
265 at91_aic_write(AT91_AIC5_EOICR, 0); 291 at91_aic5_hard_mask_irq(d);
292 at91_aic5_eoi(d);
293}
294
295static void __maybe_unused at91_aic5_release_irq(struct irq_data *d)
296{
297 unsigned long flags = hard_local_irq_save();
298 at91_aic5_hard_unmask_irq(d);
299 hard_local_irq_restore(flags);
266} 300}
301#endif /* CONFIG_IPIPE */
267 302
268static unsigned long *at91_extern_irq; 303static unsigned long *at91_extern_irq;
269 304
@@ -527,6 +562,10 @@ int __init at91_aic5_of_init(struct device_node *node,
527 at91_aic_chip.irq_mask = at91_aic5_mask_irq; 562 at91_aic_chip.irq_mask = at91_aic5_mask_irq;
528 at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; 563 at91_aic_chip.irq_unmask = at91_aic5_unmask_irq;
529 at91_aic_chip.irq_eoi = at91_aic5_eoi; 564 at91_aic_chip.irq_eoi = at91_aic5_eoi;
565#ifdef CONFIG_IPIPE
566 at91_aic_chip.irq_hold = at91_aic5_hold_irq;
567 at91_aic_chip.irq_release = at91_aic5_release_irq;
568#endif
530 at91_aic_irq_ops.map = at91_aic5_irq_map; 569 at91_aic_irq_ops.map = at91_aic5_irq_map;
531 570
532 err = at91_aic_of_common_init(node, parent); 571 err = at91_aic_of_common_init(node, parent);
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